1. Field of the Invention
This invention relates to a three-dimensional integrated memory device having a plurality of memory capacitors which capacitors are switched on and off by transistors. More particularly, the invention relates to a three-dimensional integrated device with optically coupled shared memories, which device is made of memory layers carrying memory cells and optical coupling means so that the memory cells of the adjacent memory layers are optically coupled and the thus coupled memory cells share common data by copying them with each other, whereby time delay between memory cells is minimized by the optical coupling means of simple construction for improving the processing of the integrated device.
2. Description of the Prior Art
Generally speaking, in graphic data processing and information processing which involves pattern recognition such as speech recognition, a large number of processing operations are effected in parallel in order to, for instance, repeatedly collate the object information pattern to be processed against a number of standard patterns of different kinds. The parallel operations are necessary to speed up processing of graphic data and other pattern information. To ensure a high speed in such parallel processing operations, it is practiced to run a large number of processors in parallel while coupling the contents of the memories of the parallel processors to each other, so that similar information processing operations can be effected simultaneously, and a shared memory device is required to facilitate such parallel operations.
However, the conventional large scale integration (LSI) technology provides only two-dimensional integration of circuit elements, and wiring for connecting the elements in the two-dimensional integrated circuit tends to cause a long time delay in signal transmission therethrough. In fact, the more complicated the integrated circuit is, the longer the time delay is. Thus, the conventional LSI technology has a shortcoming in that the time delay in the signal transmission therein hampers the speedup of the information processing by the above-mentioned parallel operations.